{"id":4235,"date":"2023-12-20T10:34:05","date_gmt":"2023-12-20T10:34:05","guid":{"rendered":"https:\/\/vlsid.org\/?page_id=4235"},"modified":"2023-12-21T05:29:42","modified_gmt":"2023-12-21T05:29:42","slug":"srf-phd-poster","status":"publish","type":"page","link":"https:\/\/vlsid.org\/srf-phd-poster\/","title":{"rendered":"SRF\/PhD Poster"},"content":{"rendered":"\n<style type=\"text\/css\">\n.tg  {border-collapse:collapse;border-color:#9ABAD9;border-spacing:0;}\n.tg td{background-color:#EBF5FF;border-color:#9ABAD9;border-style:solid;border-width:1px;color:#444;\n  font-family:Arial, sans-serif;font-size:14px;overflow:hidden;padding:10px 5px;word-break:normal;}\n.tg th{background-color:#409cff;border-color:#9ABAD9;border-style:solid;border-width:1px;color:#fff;\n  font-family:Arial, sans-serif;font-size:14px;font-weight:normal;overflow:hidden;padding:10px 5px;word-break:normal;}\n.tg .tg-hmp3{background-color:#D2E4FC;text-align:left;vertical-align:top}\n.tg .tg-gm9x{background-color:#D9E2F3;text-align:left;vertical-align:top}\n.tg .tg-h76i{background-color:#4472C4;color:#FFF;font-weight:bold;position:-webkit-sticky;position:sticky;text-align:center;\n  top:-1px;vertical-align:top;will-change:transform}\n.tg .tg-ezzi{background-color:#D9E2F3;text-align:left;vertical-align:top}\n.tg .tg-0lax{text-align:left;vertical-align:top}\n@media screen and (max-width: 767px) {.tg {width: auto !important;}.tg col {width: auto !important;}.tg-wrap {overflow-x: auto;-webkit-overflow-scrolling: touch;}}<\/style>\n<div class=\"tg-wrap\"><table class=\"tg\">\n<thead>\n  <tr>\n    <th class=\"tg-h76i\"><span style=\"font-weight:700;text-decoration:none;color:white;background-color:#4472C4\">Title<\/span> <\/th>\n    <th class=\"tg-h76i\"><span style=\"font-weight:700;text-decoration:none;color:white;background-color:#4472C4\">Author(s)<\/span><\/th>\n  <\/tr>\n<\/thead>\n<tbody>\n  <tr>\n    <td class=\"tg-ezzi\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Efficient Hardware Accelerator for Convolutional Neural Network based<\/span><br><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">     Inference Engines<\/span><\/td>\n    <td class=\"tg-ezzi\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\"> Deepika S and   Arunachalam V.<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-0lax\"><span style=\"font-weight:400;text-decoration:none;color:black\">DPMRS: DVFS-enabled Periodic Multi-DAG   Real-time Scheduler for heterogeneous systems<\/span><\/td>\n    <td class=\"tg-0lax\"><span style=\"font-weight:400;text-decoration:none;color:black\">Debabrata Senapati<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-ezzi\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">B-box: A Configurable RISC-V IP Generator with Emulation support<\/span><\/td>\n    <td class=\"tg-ezzi\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Simi Sukumaran,   Babu P. S and Tripti S. Warrier<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-0lax\"><span style=\"font-weight:400;text-decoration:none;color:black\">Performance Improvement of Millimeter   Wave Circuits for 5G Applications<\/span> <\/td>\n    <td class=\"tg-0lax\"><span style=\"font-weight:400;text-decoration:none;color:black\">Subbareddy Chavva and Immanuel Raja<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-ezzi\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Efficient Methods for Tackling Error in Discrete Quantum Circuits<\/span><\/td>\n    <td class=\"tg-ezzi\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Debasmita Bhoumik<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-0lax\"><span style=\"font-weight:400;text-decoration:none;color:black\">A Novel denoising filter design with   memristor weights for pacemakers<\/span><\/td>\n    <td class=\"tg-0lax\"><span style=\"font-weight:400;text-decoration:none;color:black\">Chowndharriya Rajendran<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-ezzi\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\"> Leakage Aware Dynamic Thermal Management for 3D Memory Architectures<\/span><\/td>\n    <td class=\"tg-ezzi\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Lokesh Siddhu<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-0lax\"><span style=\"font-weight:400;text-decoration:none;color:black\">Study of Double Gated JLT and its TIG   Configuration for Dynamic C2MOS Application<\/span><\/td>\n    <td class=\"tg-0lax\"><span style=\"font-weight:400;text-decoration:none;color:black\">Tika Pokhrel and Dr. Alak Majumder<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-ezzi\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Improved Auto fault   detector for Digital Ics<\/span><\/td>\n    <td class=\"tg-ezzi\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Madhura Ramegowda   and Jamuna S<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-0lax\"><span style=\"font-weight:400;text-decoration:none;color:black\">Security Verification of Compiler   Optimizations: An Information Flow Perspective<\/span><\/td>\n    <td class=\"tg-0lax\"><span style=\"font-weight:400;text-decoration:none;color:black\">Priyanka Panigrahi<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-ezzi\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Impact of Source\/Drain Extension Region, Sheet Stacking, and Interbridging   the Vertically Stacked Sheets on the Performance of Nanosheet FETs at Low   Power Applications: A Physical Insights<\/span><\/td>\n    <td class=\"tg-ezzi\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Shobhit   Srivastava, Sourabh Panwar and Abhishek Acharya<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-0lax\">G-QED Pre-silicon Verification<\/td>\n    <td class=\"tg-0lax\">Saranyu Chattopadhyay<\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-hmp3\"><span style=\"font-weight:400;text-decoration:none;color:black\">Accelerating Multi-Head Self-Attention   Architecture for Transformer Models on FPGA<\/span><\/td>\n    <td class=\"tg-hmp3\"><span style=\"font-weight:400;text-decoration:none;color:black\">Remya R, Kavya Raj and Kala S<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-gm9x\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Memory request Scheduling policies for Page migration and Prioritised   accesses, along with controlling BTI Aging in NVMs<\/span><\/td>\n    <td class=\"tg-gm9x\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Aswathy NS and   Hemangee Kapoor<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-hmp3\"><span style=\"font-weight:400;text-decoration:none;color:black\">Stochastic Spintronics Device-Based Bayesian Networks for Efficient   Uncertainty Modeling<\/span><\/td>\n    <td class=\"tg-hmp3\"><span style=\"font-weight:400;text-decoration:none;color:black\">Alisha B and Dr. Tripti S. Warrier<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-gm9x\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Processing-in-Interconnect inspired by Dendritic Computation<\/span><\/td>\n    <td class=\"tg-gm9x\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Madhuvanthi   Srivatsav, Shantanu Chakrabartty and Chetan Singh Thakur<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-hmp3\"><span style=\"font-weight:400;text-decoration:none;color:black\">Low Power Hand-Held Ultrasound Imaging   System with Novel Sparse Array Designs for Point-of-Care Applications<\/span><\/td>\n    <td class=\"tg-hmp3\"><span style=\"font-weight:400;text-decoration:none;color:black\">Banhimitra Kundu, Dr Chetan Singh Thakur and Dr Chandra Sekhar Seelamantula<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-gm9x\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Hardware Trojan in NoC   based TCMP Structure<\/span><\/td>\n    <td class=\"tg-gm9x\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\"> Atul Kumar,   Dipika Deb, Shirshendu Das and Palash Das<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-hmp3\"><span style=\"font-weight:400;text-decoration:none;color:black\">Intelligent and Reconfigurable Deep   Learning Augmented Wireless Channel Estimation at Edge<\/span><\/td>\n    <td class=\"tg-hmp3\"><span style=\"font-weight:400;text-decoration:none;color:black\">Syed Asrar ul haq and Sumit Darak<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-gm9x\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">HLS based Hardware   Security and IP Protection<\/span><\/td>\n    <td class=\"tg-gm9x\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Rahul Chaurasia<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-hmp3\"><span style=\"font-weight:400;text-decoration:none;color:black\">Domain-Specific Hardware Design with   Emphasis on Energy Efficiency, Performance and Robustness<\/span><\/td>\n    <td class=\"tg-hmp3\"><span style=\"font-weight:400;text-decoration:none;color:black\">Kailash Prasad<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-gm9x\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">On-board satellite   hyperspectral data compression<\/span><\/td>\n    <td class=\"tg-gm9x\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Vijay Joshi<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-hmp3\"><span style=\"font-weight:400;text-decoration:none;color:black\">Performance Optimization of   Epitaxial-Layer Based Si\/SiGe Hetero-junction Area Scaled Tunnel FET   Label-Free Biosensors Considering Steric Hindrance With the impact of Back   Gate Biasing and Quantum Confinement<\/span><\/td>\n    <td class=\"tg-hmp3\"><span style=\"font-weight:400;text-decoration:none;color:black\">Sourabh Panwar, Shashidhara M, Shobhit Srivastava and Abhishek Acharya<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-gm9x\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Thermal Estimation and   Efficient Test Scheduling for Three-Dimensional Integrated Circuits<\/span><\/td>\n    <td class=\"tg-gm9x\"><span style=\"font-weight:400;text-decoration:none;color:black;background-color:#D9E2F3\">Subhajit   Chatterjee<\/span><\/td>\n  <\/tr>\n  <tr>\n    <td class=\"tg-hmp3\"><span style=\"font-weight:400;text-decoration:none;color:black\">Performance Evaluation of 2D Material   FET-based Bio-Sensors through Multiscale Simulation Approach<\/span><\/td>\n    <td class=\"tg-hmp3\"><span style=\"font-weight:400;text-decoration:none;color:black\">Saptarshi Neogi<\/span><\/td>\n  <\/tr>\n<\/tbody>\n<\/table><\/div>\n","protected":false},"excerpt":{"rendered":"<p>Title Author(s) Efficient Hardware Accelerator for Convolutional Neural Network based Inference Engines Deepika S and Arunachalam V. DPMRS: DVFS-enabled Periodic Multi-DAG Real-time Scheduler for heterogeneous systems Debabrata Senapati B-box: A Configurable RISC-V IP Generator with Emulation support Simi Sukumaran, Babu P. S and Tripti S. Warrier Performance Improvement of Millimeter Wave Circuits for 5G Applications Subbareddy Chavva and Immanuel Raja Efficient Methods for Tackling Error in Discrete Quantum Circuits Debasmita Bhoumik A Novel denoising filter design with memristor weights for pacemakers Chowndharriya Rajendran Leakage Aware Dynamic Thermal Management for 3D Memory Architectures Lokesh Siddhu Study of Double Gated JLT and\u2026<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":[],"blocksy_meta":{"styles_descriptor":{"styles":{"desktop":"","tablet":"","mobile":""},"google_fonts":[],"version":5}},"_links":{"self":[{"href":"https:\/\/vlsid.org\/wp-json\/wp\/v2\/pages\/4235"}],"collection":[{"href":"https:\/\/vlsid.org\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/vlsid.org\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/vlsid.org\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/vlsid.org\/wp-json\/wp\/v2\/comments?post=4235"}],"version-history":[{"count":2,"href":"https:\/\/vlsid.org\/wp-json\/wp\/v2\/pages\/4235\/revisions"}],"predecessor-version":[{"id":4280,"href":"https:\/\/vlsid.org\/wp-json\/wp\/v2\/pages\/4235\/revisions\/4280"}],"wp:attachment":[{"href":"https:\/\/vlsid.org\/wp-json\/wp\/v2\/media?parent=4235"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}