Poster schedule
Main Conference Day - 1 (6th Jan 2025)
PaperID: 208, Title – Advancing Neural Network Performance with Probabilistic Computing for ReLU Function, Authors – Srinivasu bodapati, AMIT SINGH and Amit Kumar Jangid.
PaperID: 310, Title – MAGIC-based High-Speed Adders for In-Memory Computing using Memristors, Authors – Srinivasu bodapati and Shri Janani Senthil.
PaperID: 113, Title – FRoZN: Fault-Tolerant Routing Technique using Reinforcement Learning for ZMesh NoC, Authors – JITESH CHOUDHARY, Imran Hussain Barbhuiya, Dharrun Singh M and Dr. Soumya J.
PaperID: 377, Title – QuaLITi: Quantum Machine Learning Hardware Selection for Inferencing with Top-Tier Performance, Authors – Koustubh Phalak and Swaroop Ghosh.
PaperID: 127, Title – Low Form-Factor Switchless Dual-Band Matching Network for RF Power Harvesting Systems, Authors – Arun Mohan, Saroj Mondal, Yash Nageshwar Rayudu and Roy P. Paily.
PaperID: 370, Title – OwlsEye: Real-Time Low-Light Video Instance Segmentation on Edge and Exploration of Fixed-Posit Quantization, Authors – Gaurav M. Shah, Abhinav Goud, Zaqi Momin and Joycee Mekie.
PaperID: 151, Title – A Tug-of-War between Static and Dynamic Memory in Intel SGX, Authors – Sandeep Kumar, Abhisek Panda, Advait Nerlikar and Smruti R. Sarangi.
PaperID: 175, Title – RISC-V Based Secure Processor Architecture for Return Address Protection, Authors – Lalit Sharma and Neeraj Goel.
PaperID: 146, Title – Optimal Respiratory Rate Estimation with mmWave Sensing using PYNQ System-on-Chip Platform, Authors – Mohammed Musayyeb Sherwani, Mohammad Abdul Azeem, Mohd Usman, SIDDIQUE AHMAD, Mujeev Khan, Raaziyah Shamim and Mohd Wajid.
PaperID: 258, Title – A 0.27-THz Frequency Multiplier Chain using Harmonic Mixing with Multiplication of ×18 in 65-nm CMOS, Authors – Shiva Bollam Prasad and Mahima Arrawatia.
PaperID: 66, Title – Boosting System-on-Chip Performance through AI-assisted Optimization using Compositional Neural Networks, Authors – Surinder Sood and Priyatam Roy.
PaperID: 273, Title -AI-Driven Anomaly Detection in Oscilloscope Images for Post-Silicon Validation, Authors – Kowshic Ahmed Akash, Tobias Wulf, Torsten Valentin, Alexander Geist, Ulf Kulau and Sohan Lal. PaperID: 229, Title – A Constructive High-Speed Crypto-mining Approach with Dual SHA-256 on an FPGA, Authors – Velamala Pavan Kumar and Aravindhan Alagarsamy.
PaperID: 236, Title – Enhancing Digital Microfluidic Biochip Operations with Scheduling Interval Method, Authors – Nirmala N and Dr GRACIA Nirmala Rani D.
PaperID: 209, Title – A First Principle Based Comparative Study Between Pristine and Au-modified Graphene Nanosheet towards Acetaldehyde Sensing Performance, Authors – Indranil Maity, Soubarno Chatterjee and Souvik Bhanja.
Invited Poster 1, Title – ESD Electronic Design Automation Challenges – New Revision of ESDA Technical Report ESD TR18.0-01 , Authors – Subhadeep Ghosh, Nate Peachey, Souvick Mitra.
Main Conference Day - 2 (7th Jan 2025)
PaperID: 284, Title – Optimizing Multipliers: An Energy-Efficient Design Using a Novel 3:2 Compressor, Authors – L Hemanth Krishna, Sreehari Veeramachaneni, srinivasu bodapati, Bhaskara Rao Jammu and Noor Mahammad Sk.
PaperID: 232, Title – Meta-Heuristic Optimization of Custom Heterogeneous Blocks Defined eFPGA Design, Authors – Bhargav D V, Pradyumna G and Madhav Rao.
PaperID: 134, Title – An Innovative Solution to Improve Ultra Low Voltage Writability and Leakage in GPU SRAMs, Authors – Deepesh Gujjar, Sanatkumar upadhye, Sandipan Sinha, Taha Khursheed, Jigar Patel, Manish Trivedi and Sagar abachi.
PaperID: 14, Title -Bidirectional Spiking Neuron Based Dual-Mode Signal Acquisition Front-End System, Authors – Tamal Chowdhury and Pradip Mandal.
PaperID: 262, Title -Hardware Implementation of Blind Decoding of Downlink Control Information for 5G, Authors – Anu rajarajeswari Y, Nitin Chandrachoodan, Anji Babu Vadapalli and Klutto Milleth J.
PaperID: 186, Title – Low-Power and Superior Performance Design of Ternary Logic Cells Using CNFET and MOSFET Devices for VLSI Applications, Authors – Siva Chinmai Varma Bhupathiraju, Sai Krishna Sridhara, Yashwanth Komuravelly and Ramakant Yadav.
PaperID: 282, Title – Design of Manchester Carry Chain Hybrid Adder for MASH 1-1-1 Delta Sigma Modulator for Fractional-N Frequency Synthesizers, Authors – ABHINAV S, Karthikeya Busam, Ishan Acharyya, Anushka Tripathi and Abhishek Srivastava.
PaperID: 196, Title – Enhancing Reliability and Energy Efficiency in Network-on-Chip Architectures through Hybrid Sorting Algorithm-Based Core Mapping, Authors – B Naresh Kumar Reddy, Srinivasulu Jogi and Charan Krishna.
PaperID: 378, Title – A Early Bug Detector – A Verification Methodology for DFD-SOC RTL Parameters, Authors – Bhagyalakshmi C, Madhav Lekkala and Maneesh Pandey.
PaperID: 120, Title – TimeFloats: Train-in-Memory with Time-Domain Floating-Point Scalar Products, Authors – Maeesha BinteHashem, Benjamin Parpillon, Divake Kumar, Dinithi Jayasuria and Amit Ranjan Trivedi.
PaperID: 345, Title – Layer-Specific Hardware Pooling Designs for CNN Accelerators, Authors – Vinay R, Mahati Basavaraju and Madhav Rao.
PaperID: 126, Title – Effective Memory Management and Sparse Aware Cache for Row-wise Sparse CNNs, Authors – Balasubramaniam MC, Basava Naga Girish Koneru and Nitin Chandrachoodan.
PaperID: 191, Title – An Ensemble MLP-RF Model for the Prediction of DG-MOSFETs: Addressing Fabrication Process Variations, Authors – M. Vaikunth, Khushwant Sehra, Vandana Kumari and Manoj Saxena.
PaperID: 382, Title – HapticGuide: Interactive Wearable Braille Guide for Enhancing Visual Education, Authors – Divyansh Singhal, Yash Gupta, Daksh Sharma, Chinmay Sultania and Madhav Rao.
PaperID: 331, Title – TCAD based Study of String Current Variability in 3D NAND Flash Memory, Authors – Mrinmoy Mahapatra, Prathamesh Ganesh Kekarjawlekar and Dr. Akshay K.
Invited Poster 2, Title – ESD Technology Roadmap, Authors – Nate Peachey, Subhadeep Ghosh, Souvick Mitra.