Full Paper Submission Deadline: 28th August 2023 [Closed]
Notification for Acceptance: : On or Before 15th October, 2023[Closed]
Camera Ready Paper Submission and Registration: 20th November, 2023
Artificial Intelligence (AI)/Machine Learning (ML) Hardware: All aspects of AI algorithms and their hardware implementation; System, architecture, and circuit-level innovations for AI / ML; AI accelerator design; AI boosted circuits and systems for Brain Machine Interface (BMI);Intelligent storage Memory-centric accelerator design; Autonomous systems; Trusted architectures for AI; Neuromorphic computing; Brain-inspired computing and communication.
Analog, Mixed-Signal, and RF Circuits: Amplifiers, comparators, oscillators, filters, references; Nonlinear analog circuits; Digitally-assisted analog circuits; Analog design at lower technology nodes; Analog circuits for diverse applications; Data Converters;PLL/ ADPLL; I/O Design; Bio-inspired analog and mixed signal circuits; Analog circuits and instrumentation related to Biomedical, healthcare, sensor interfacing, wearable and flexible systems; Low Noise Circuits; EMI Immune Design; Auto Calibration Techniques; Wearableel ectronics; Flexible electronics; Ultra-low power circuit techniques; High Speed Interfaces, RF, mm-Wave and THz transceivers, SoCs, and SiPs; Frequency synthesizers; System architecture for 5G and 6G wireless, next generation systems for radar, sensing, and imaging;Reliability aspects in RFICs and building blocks for transceivers.
Photonic Integrated Circuits: Silicon and III-V Photonic Integrated Circuits, Waveguides / interconnects, On-chip lasers, Optical Multiplexers / Demultiplexers, Photo detectors and sensors, Quantum photonics, RF Photonics, Mid-IR / THz Photonics, Heterogeneous integration, Packaging of Photonic devices, Quantum photonics, RF Photonics, Mid-IR and THz Photonics.
Hardware and Systems Security: Secure and trustworthy hardware; Microelectronics supply chain security; Side-channel Attack
(SCA); Fault injection attacks and mitigation; Hardware IP protection; Hardware Trojan attacks and mitigation; Security of IoT/CPS; Firmware and software security; Secure cryptography; Automotive security; Security of multi-tenant systems; Scan protection; Row hammer attacks and mitigation; Physically Unclonable Functions (PUFs); Hardware design for Fully Homo morphic Encryptions (FHE); Micro-architectural security; Security of emerging devices and systems.
Test, Verification, and Reliability: Simulation, formal verification, validation at different abstraction levels; Hardware emulation; Design for Test (DFT); fault modelling and simulation; ATPG and BIST; Post-silicon validation and debug; Delay test and speed-binning; Memory test, Reliability and fault tolerance; 2.5D / 3D IC testing; Analog and Mixed-signal testing; Static/dynamic defect and fault-recoverability; Learning-assisted testing; Statistical Testing; Variation-aware design.
Electronic Design Automation (EDA): Logic and behavioral synthesis; Logic mapping, simulation and formal verification;Physical design techniques; Post-route optimizations; memory compiler;Simulation tools for design verification; Static Timing Analysis and timing exceptions; Mixed-Signal simulations; EDA for sub-10nm nodes; Design for Debug (DFD)tools; Application of AI/ML in CAD for VLSI; CAD for printed circuit boards (PCBs), CAD for secure chips.
Advanced Process/Material, Device Design and Modelling: Advanced CMOS process; Low-dimensional materials and devices; Meta-Materials; 2D and nano wire devices; Nano-patterning; Directed self-Assembly; EUV, ALE and selective deposition; Strain/channel engineering; Advanced manufacturing technology; Fabrication of Nano-Sensors and Bio-Sensors; metrology and yield; Deep nanoscale CMOS devices; Device modeling and simulation; Multi-domain simulation; device/circuit-level reliability and variability; Devices for beyond CMOS, compact modeling and novel TCAD
solutions, GaN and SiC devices for High Voltage applications, Design for Manufacturing (DFM) and Design for Yield (DFY).
Sensors, Packaging, and Interconnects: Methodologies and tools for Wafer-level packaging; Embedded chip packaging; 2.5D/3D integration with Silicon, SiCand Glass interposer; Thermal characterization and simulation; Component, system and product-level thermal management and characterization; Au/Ag/Cu/Al Wire-bond/Wedge bond technology; Flip-chip and Cu pillar; Solder alternatives; Cu to Cu, wafer-level bonding and die attachment (Pb-free), Fan-out, panel-level, chiplets, SiP, micro-bump, high I/O thermo compression /hybrid bonding; fine-pitch/multi-layer RDL; Printable interconnects.
Photonic Integrated Circuits, Wireless systems 5G and beyond, and Optical Communication: Silicon and III-V Photonic Integrated Circuits; Wave guides/interconnects; On-chip lasers; Optical Multiplexers/Demultiplexers; Photodetectors and sensors; Quantum photonics, RF Photonics, Mid-IR/THz Photonics; Heterogeneous integration; Packaging of photonic devices; Quantum photonics; RF Photonics Mid-IR and THz Photonics; Receivers/transmitters/ transceivers for wireline systems;Exploratory I/O circuits for advancing data rates, bandwidth density, power efficiency, equalization, robustness, adaptation capability,and design methodology.
Emerging Computing and post-CMOS Technologies: Quantum InformationProcessing Systems; Quantum logic circuits; Quantum algorithms; Spin-based computing; Reversible computing; Approximate and stochastic computing; Cryogenic processors; MEDA; Microfluidic
Biochips; Emerging memory technologies (ReRAM, Memristor, MRAM, FeRAM. nanotube RAM, phase-change memory);
MEMS/NEMS devices andapplications; Electronics for automotive systems; Device, circuit, architecture design, analysis and optimization for neuromorphic computing systems.
Low-power Digital Systems: Next generation digital circuits, building blocks, and complete systems (monolithic, 2.5D, and 3D) for reduced power and form factor; Near- and sub-threshold systems; Energy-efficient algorithms and applications; Energy-efficient storage systems; Digital circuits for intra-chip communication; Clock distribution; Low-power and robust design; Digital regulators and digital sensors; Low-power autonomous systems; Low-power communication; Advances in memory architectures for power reduction; Design for low-power FPGA, GPU, NPU and TPU.
Power and Energy Management: Power management and control circuits, Regulators; Power converter ICs; Energy harvesting circuits and systems; Wide-bandgap topologies and gate-drivers; Power and signal isolators; Power management for automotive systems; Battery management circuits and systems; Power Delivery Networks (PDN); Power Switches; High Voltage Circuits and Systems; Power management for High Voltage Application; Power/Thermal balance.
- Hardware for Machine Learning and Artificial Intelligence
- Analog & Mixed Signal and, RF Circuits
- Embedded Systems, Internet of Things (IoT), and Cyber-Physical System (CPS) Design
- Hardware and Systems Security
- Test, Verification, and Reliability
- Electronic Design Automation
- Advanced process and Material, Device design and modelling
- Sensors, Packaging, and Interconnects
- Photonic Integrated Circuits, Wireless systems 5G and beyond, and Optical Communication
- Emerging Computing & Post-CMOS Technologies
- Low power Digital Systems
- Low power Digital Systems
- Power and Energy Management
- Power and Energy Management
- Emerging Memory Technologies
- Quantum computing