Call for Papers
Full Paper Submission Deadline: 31st August 2024 Submission is Closed.
Notification for Acceptance: 5th October 2024 20th October 2024
Enquiries: Contact us
Full Paper Submission Deadline: 31st August 2024 Submission is Closed
Notification for Acceptance: 5th October 2024 20th October 2024
Enquiries: Contact us
The VLSID 2025 conference provides a platform for researchers and practitioners to explore how VLSI and Embedded Systems can drive disruptive advancements for the next generation. Original contributions are solicited on topics covered under broad areas such as (but not limited to) below mentioned topics.
Paper Submission: Authors are invited to submit full-length (6 pages maximum), original, unpublished papers along with an abstract of at most 200 words. To enable blind review, the author list should be omitted from the main document. Previously published papers or papers currently under review for other conferences/journals should NOT be submitted and will not be considered. Electronic submission in PDF format is required. Author and contact information (name, affiliation, mailing address, telephone, fax, e-mail) must be entered during the submission process. Paper Format: Submissions should be in camera-ready IEEE two-column format, following the IEEE proceedings specifications.
Topics:
- Hardware for Machine Learning and Artificial Intelligence
- Analog & Mixed Signal and, RF Circuits
- Sensors interfacing circuits and systems
- VLSI for Automotive Circuits and Systems
- Test, Verification and Reliability
- Embedded Systems, Internet of Things (IoT), and Cyber-Physical System Design
- Electronic Design Automation
- Low power Digital Systems
- Advances in CAD for VLSI
- Latest trends in device design and modelling
- Beyond 2D in Packaging and interconnects
- Hardware and Systems Security
- Emerging Memory Technologies
- Advanced process and Material
- Photonic Integrated Circuits and Optical Communication
- Wireless Systems, 5G and beyond
- Power & Energy Management
- Emerging Computing & Post-CMOS Technologies
- Quantum Computing
- FPGA Architecture Design – Layout Design, Open FPGA
- Neuromorphic Computing – Spiking Neural Networks, Neuron models
- Chiplets based heterogeneous designs
Paper Publication and Presenter Registration: Papers will be accepted for regular or poster presentations at the conference. Every accepted paper MUST have at least one author registered to the conference by the time the camera-ready paper is submitted; at least one of the authors is also expected to attend the conference and present the paper.
Please refer the brochure for details.