SRF/PhD Poster
Title | Author(s) |
---|---|
Efficient Hardware Accelerator for Convolutional Neural Network based Inference Engines |
Deepika S and Arunachalam V. |
DPMRS: DVFS-enabled Periodic Multi-DAG Real-time Scheduler for heterogeneous systems | Debabrata Senapati |
B-box: A Configurable RISC-V IP Generator with Emulation support | Simi Sukumaran, Babu P. S and Tripti S. Warrier |
Performance Improvement of Millimeter Wave Circuits for 5G Applications | Subbareddy Chavva and Immanuel Raja |
Efficient Methods for Tackling Error in Discrete Quantum Circuits | Debasmita Bhoumik |
A Novel denoising filter design with memristor weights for pacemakers | Chowndharriya Rajendran |
Leakage Aware Dynamic Thermal Management for 3D Memory Architectures | Lokesh Siddhu |
Study of Double Gated JLT and its TIG Configuration for Dynamic C2MOS Application | Tika Pokhrel and Dr. Alak Majumder |
Improved Auto fault detector for Digital Ics | Madhura Ramegowda and Jamuna S |
Security Verification of Compiler Optimizations: An Information Flow Perspective | Priyanka Panigrahi |
Impact of Source/Drain Extension Region, Sheet Stacking, and Interbridging the Vertically Stacked Sheets on the Performance of Nanosheet FETs at Low Power Applications: A Physical Insights | Shobhit Srivastava, Sourabh Panwar and Abhishek Acharya |
G-QED Pre-silicon Verification | Saranyu Chattopadhyay |
Accelerating Multi-Head Self-Attention Architecture for Transformer Models on FPGA | Remya R, Kavya Raj and Kala S |
Memory request Scheduling policies for Page migration and Prioritised accesses, along with controlling BTI Aging in NVMs | Aswathy NS and Hemangee Kapoor |
Stochastic Spintronics Device-Based Bayesian Networks for Efficient Uncertainty Modeling | Alisha B and Dr. Tripti S. Warrier |
Processing-in-Interconnect inspired by Dendritic Computation | Madhuvanthi Srivatsav, Shantanu Chakrabartty and Chetan Singh Thakur |
Low Power Hand-Held Ultrasound Imaging System with Novel Sparse Array Designs for Point-of-Care Applications | Banhimitra Kundu, Dr Chetan Singh Thakur and Dr Chandra Sekhar Seelamantula |
Hardware Trojan in NoC based TCMP Structure | Atul Kumar, Dipika Deb, Shirshendu Das and Palash Das |
Intelligent and Reconfigurable Deep Learning Augmented Wireless Channel Estimation at Edge | Syed Asrar ul haq and Sumit Darak |
HLS based Hardware Security and IP Protection | Rahul Chaurasia |
Domain-Specific Hardware Design with Emphasis on Energy Efficiency, Performance and Robustness | Kailash Prasad |
On-board satellite hyperspectral data compression | Vijay Joshi |
Performance Optimization of Epitaxial-Layer Based Si/SiGe Hetero-junction Area Scaled Tunnel FET Label-Free Biosensors Considering Steric Hindrance With the impact of Back Gate Biasing and Quantum Confinement | Sourabh Panwar, Shashidhara M, Shobhit Srivastava and Abhishek Acharya |
Thermal Estimation and Efficient Test Scheduling for Three-Dimensional Integrated Circuits | Subhajit Chatterjee |
Performance Evaluation of 2D Material FET-based Bio-Sensors through Multiscale Simulation Approach | Saptarshi Neogi |