Tutorial 4 | 6th Jan | 9:30 AM – 12:30PM (IST)
Agile Software-Hardware Co-Design of AI-Centric Heterogeneous SoCs
Speaker: Pradip Bose, Thomas J. Watson Research Center, IBM, USA
About Speaker:
Pradip Bose is a Distinguished Research Scientist and Manager of the Efficient & Resilient Systems department at IBM T. J. Watson Research Center. He has 40+ years of experience at IBM, where he was a member of the pioneering research project on RISC super scalar processors (at IBM Research) that led to the POWER-series processors and systems at IBM in the early 1990s. He was the lead performance engineer in POWER-3, and he has been involved in the pre-silicon power-performance modeling and power management of virtually all the POWER processors since then. He has also actively led the migration of power management techniques from the POWER platform to IBM’s mainframe platform (z Systems) since the z13 product. Since 2012 he has served as the Principal Investigator of several successive DARPA-sponsored projects that have focused on highly energy-efficient edge processor design methodologies, with a more recent (2018-2023) emphasis on domain-specific SoCs that are easily programmable. These projects were driven by specific edge application use-cases of interest to the U.S. Department of Defense as well as commercial AI-centric enterprises within IBM and other cloud computing vendors. Pradip holds a B.Tech. (Hons.) degree in Electronics and Electrical Communication Engineering from I.I.T. Kharagpur (1977); M.S. and Ph.D degrees in Electrical and Computer Engineering from University of Illinois at Urbana-Champaign (UIUC, 1981 & 1983). He holds well over 150 U.S. patents and the title of IBM Master Inventor. He also has over 180 peer-reviewed publications and several edited books to his credit. He is a Fellow of the IEEE and is a member of IBM’s elite Academy of Technology (recently renamed as the Open Innovation Community). He has given numerous tutorials and organized workshops at leading international conferences (e.g., ISCA, MICRO, HPCA in the computer architecture domain as well as DSN, ITC, ICCD and VLSI Design in the design community). He served as the co-General Chair of VLSI Design (with Prof. Susmita Sur-Kolay), held in Kolkata in 2016.
Tutorial Abstract:
Intelligent edge systems constitute a key growth segment within the cloud-backed cognitive IoT marketplace. The EPOCHS (“Efficient Programmability of Cognitive Heterogeneous Systems”) research project at IBM (with collaborative university partners) is driven by the specific edge application domain of connected autonomous vehicles. Our team has developed leading edge methodologies for agile software-hardware co-design of heterogeneous SoCs to support the target application domain (along with adjacent domains like extended reality-driven use cases). As part of this project, we have successfully taped out two functional EPOCHS chips in 12 nm technology, and have demonstrated full-stack (software-hardware co-designed) solutions using both FPGA and ASIC versions of the SoCs. Specific use cases that have been illustrated in the context of our active technology transition phase are: (a) collaborative perception, involving a pair of communicating autonomous vehicles; (b) detecting hazards while scanning for objects and vehicles during autonomous navigation; (c) sentiment analysis of human-expressed conversations or commands (using an NLP algorithm). In this tutorial, we summarize the key innovations and open-source tools-driven agile methodology derived from this 5-year DARPA-sponsored project (2018-2023) that is now transitioning into commercially deployable solutions in partnership with clients. In particular, we cover the following aspects of the overall topic area in considerable detail: (a) the fundamentals of Columbia’s ESP-driven agile SoC methodology, with demonstrated proof points in 10-100X improvement in designer productivity; (b) domain-specific hardware accelerators for AI/NLP – architecture and design
