Global Synergy in Silicon: VLSI and Embedded AI for Sustainable Computing and Next-Gen Electrified Mobility
Tape Out VLSID 2026
Call for Submissions: Tape-Out Contest at VLSID 2026
Important Dates
Date of submission: 15th November, 2025
Notification for best project: 2nd December, 2025
We are pleased to announce that the finalists for the Digital and Analog Tape-Out categories at the VLSID 2026 Tape-Out Contest have been selected and notified. Esteemed industry and academic veterans from organizations such as Intel, Qualcomm, STMicroelectronics, SenseSemi, and Renesas dedicated significant time to evaluate each entry based on its maturity, complexity, and innovation.
We look forward to showcasing more content from the finalists at VLSID 2026 in Pune, where a live jury will select two winners from each category. For further information, please contact us at tapeout.vlsi@vlsid.org.
We are excited to announce that submissions are now open for the Tape-Out Contest at VLSID 2026! This contest celebrates innovation and excellence in integrated circuit design, with two distinct categories: Digital Tape-Out and Analog Tape-Out.
Eligibility: Students who have completed any digital or analog tape-out in the last two years are welcome to participate. Please use the Google form below:
Categories
The contest has two categories:
- Digital Tape-Out: Designs implemented with digital logic.
- Analog Tape-Out: Circuits focused on analog, mixed-signal, or RF designs.
The winners of this contest will be invited to attend VLSID 2026 and will be felicitated.
For any questions, please contact us