Program Summary

Note: This is a draft program summary, indicative of planned agenda. Keep checking this page for frequent updates. A detailed program agenda will be uploaded soon.

Day 1

Day 2

Day 3

Day 4

Day 5

Day 1

Day 2

Day 3

Day 4

Day 5

Start	End	Duration	4th January, 2025 – Saturday
8:00 AM	9:30 AM	1:30	Registrations
			Room 1	Room 2	Room 3	Room 4
9:30 AM	11:00 AM	1:30	Analog Design & Semiconductor Physics-I	AI applications for VLSI-I	Security and Privacy-I	Signal Processing & Communication I
11:00 AM	11:30 AM	0:30	Tea Break
11:30 AM	1:00 PM	1:30	Analog Design & Semiconductor Physics-II	AI applications for VLSI-II	Security and Privacy-II	Signal Processing & Communication II
1:00 PM	2:00 PM	1:00	Lunch Break
2:00 PM	3:30 PM	1:30	Memory Technologies-I	Advanced Verification Techniques-I	Cognitive Systems-I	Embedded Systems and Internet-of-Bodies I
3:30 PM	4:00 PM	0:30	Tea Break
4:00 PM	5:30 PM	1:30	Memory Technologies-II	Advanced Verification Techniques-II	Cognitive Systems-II	Embedded Systems and Internet-of-Bodies II

Start	End	Duration	5th January, 2025 – Sunday
8:00 AM	9:00 AM	1:00	Registrations
			Room 1	Room 2	Room 3	Room 4
9:00 AM	9:30 AM	0:30	Invited Talk	Invited Talk	Invited Talk	Invited Talk
9:30 AM	11:00 AM	1:30	AI: Accelerators & Inferencing Hardware-I	Emulation and Testing-I	Power Circuits-I	Edge Computing-I
11:00 AM	11:30 AM	0:30	Tea Break
11:30 AM	1:00 PM	1:30	AI: Accelerators & Inferencing Hardware-II	Emulation and Testing-II	Power Circuits-II	Edge Computing-II
1:00 PM	2:00 PM	1:00	Lunch Break
2:00 PM	3:30 PM	1:30	New Age Semiconductors-I	Quantum Computing-I	RISC-V I	ESD Design
3:30 PM	4:00 PM	0:30	Tea Break
4:00 PM	5:30 PM	1:30	New Age Semiconductors-II	Quantum Computing-II	RISC-V II	Packaging Technology

Start	End	Duration	6 January, 2025 – Monday
			Plenary
8:00 AM	9:00 AM	1:00	Registrations
9:00 AM	10:00 AM	1:00	Inaugural
10:00 AM	10:30 AM	0:30	Keynote-Si-1
10:30 AM	11:00 AM	0:30	Keynote-Si-2
11:00 AM	11:30 AM	0:30	Tea Break
11:30 AM	11:55 AM	0:25	Keynote-P-1
11:55 AM	12:20 PM	0:25	Keynote-P-2
12:20 PM	12:45 PM	0:25	Keynote-P-3
12:45 PM	2:00 PM	1:15	Lunch Break
2:00 PM	2:45 PM	0:45	Panel Disussion -1
2:45 PM	3:10 PM	0:25	Keynote-P-4
3:10 PM	3:30 PM	0:20	Keynote-Academia-1
3:30 PM	4:00 PM	0:30	Tea Break
			Grand Ball Room	Royal Ball Room	Maharaja-1	Maharaja-2	Diya	Turret
			Track : Test, Verification and Reliability Session chairs- Jaidev Shenoy	Track : Embedded Systems Session chairs- Neha Srivastava	Track : AIML Hardware Accelerators Session chairs- Viveka K R	Track: Industry Forum	Track: Design Contest	Track: UDT
4:00 PM	4:20 PM	0:20	Invited Talk	PaperID – 351	Invited Talk	Industry Forum-1-Marvell	Des Con-1	UDT1
4:20 PM	4:40 PM	0:20	PaperID – 118	PaperID – 326	PaperID – 172	Industry Forum-2-Microchip	Des Con-2	UDT2
4:40 PM	5:00 PM	0:20	PaperID – 185	PaperID – 91	PaperID – 279	Industry Forum-3-NXP	Des Con-3	UDT3
5:00 PM	5:20 PM	0:20	PaperID – 217	PaperID – 12	PaperID – 313	Industry Forum-4-TATA	Des Con-4	UDT4

Start	End	Duration	7 January, 2025 – Tuesday
			Plenary
8:00 AM	9:30 AM	1:30	Registrations
9:30 AM	9:50 AM	0:20	Keynote-G-1
9:50 AM	10:10 AM	0:20	Keynote-G-2
10:10 AM	10:30 AM	0:20	Keynote-G-3
10:30 AM	11:00 AM	0:30	Fireside Chat – 1
11:00 AM	11:30 AM	0:30	Tea Break
11:30 AM	11:50 AM	0:20	Keynote-Invited-1
11:50 AM	12:10 PM	0:20	Keynote-Academia-2
12:10 PM	12:30 PM	0:20	Keynote-Invited-2
12:30 PM	12:50 PM	0:20	Keynote-G-4
12:50 PM	1:50 PM	1:00	Lunch Break
1:50 PM	2:40 PM	0:50	Panel Discussion – 2
			Grand Ball Room	Royal Ball Room	Maharaja-1	Maharaja-2	Diya	Turret
			Track : Analog and Mixed Signal Design Session chairs- Sanjay Wadhwa	Track: Embedded Systems Session chairs- Neha Srivastava	Track: Hardware Security Session chairs- Utsav Banerjee	Track: Industry Forum, WiE	Track : UDT	Track : PhD Forum
2:40 PM	3:00 PM	0:20	PaperID – 178	Invited Talk	Invited Talk	Industry Forum 5 – Renesas	UDT-5	PhD Forum-1
3:00 PM	3:20 PM	0:20	PaperID – 238	PaperID – 156	PaperID – 162	Industry Forum 6- MOSCHIP	UDT-6	PhD Forum-2
3:20 PM	3:40 PM	0:20	PaperID – 153	PaperID – 204	PaperID – 92	Industry Forum 7 – QG	UDT-7	PhD Forum-3
3:40 PM	4:00 PM	0:20	PaperID – 167	PaperID – 353	PaperID – 306	WiE-1	UDT-8	PhD Forum-4
4:00 PM	4:30 PM	0:30	Tea Break
			Grand Ball Room	Royal Ball Room	Maharaja-1	Maharaja-2	Diya	Turret
			"Track: EDA & CAD Session chairs- Chandan Karfa"	Track: Processors and Reconfigurable Computing Session chairs- Nanditha Rao & Madhura Poornaprajna	Track: Logic and Circuit Design Session chairs- Sparsh Mittal	Track: Industry Forum, WiE	Track : UDT & Track: Power Management, Session Chair: Qadeer Khan	Track : SRF
4:30 PM	4:50 PM	0:20	PaperID – 59	PaperID – 215	PaperID – 277	WiE-Fireside	UDT-9	SRF-1
4:50 PM	5:10 PM	0:20	PaperID – 357	PaperID – 53	PaperID – 96	WiE-Fireside	UDT-10	SRF-2
5:10 PM	5:30 PM	0:20	PaperID – 350	PaperID – 79	PaperID – 176	WiE-2	PaperID – 368	Startup: Masterclass
5:30 PM	5:50 PM	0:20	PaperID – 64	PaperID – 241	PaperID – 107	WiE-3	PaperID – 311	Startup: Masterclass
5:50 PM	6:30 PM	0:40	Tea Break
			Plenary
6:30 PM	6:55 PM	0:25	Keynote-Silicon-S-3
6:55 PM	7:10 PM	0:15	Chief Guest Address
7:10 PM	8:00 PM	0:50	Awards: Ceremony
8:00 PM	9:30 PM	1:30	Dinner

Start	End	Duration	8 January, 2025 – Wednesday
			Plenary
8:00 AM	9:30 AM	1:30	Registrations
9:30 AM	9:50 AM	0:20	Keynote-Academia-3
9:50 AM	10:10 AM	0:20	Keynote-G-5:
10:10 AM	11:00 AM	0:50	Panel Discussion-3
11:00 AM	11:30 AM	0:30	Tea Break
11:30 AM	11:50 AM	0:20	Keynote-G-6:
11:50 AM	12:10 PM	0:20	Keynote-Academia-4
12:10 PM	1:00 PM	0:50	Panel Discussion-4
1:00 PM	2:00 PM	1:00	Lunch Break
			Grand Ball Room	Royal Ball Room	Maharaja-1	Maharaja-2	Diya	Turret
			"Track: Hardware Security Session chairs- Chester Rebeiro"	"Track: Logic & Circuit Design Session chairs- Debayan Das"	"Track: Quantum and Neuromorphic Computing Session chairs- Debjyoti Bhattacharjee"	"Track : 3D IC & In-Memory Computing Session chairs-TBD"	Track: Design Contest	Track: Industry Forum
2:00 PM	2:20 PM	0:20	PaperID – 78	PaperID – 278	PaperID – 114	Invited Talk	Des Con-5	Industry Forum-8 – TATA
2:20 PM	2:40 PM	0:20	PaperID – 381	PaperID – 228	PaperID – 202	PaperID – 253	Des Con-6	Industry Forum-9- TATA
2:40 PM	3:00 PM	0:20	PaperID – 145	PaperID – 143	PaperID – 325	PaperID – 117	Des Con-7	Industry Forum-10
3:00 PM	3:20 PM	0:20	PaperID – 116	PaperID – 256	PaperID – 302	PaperID – 329	Des Con-8	Industry Forum-11
3:20 PM	3:50 PM	0:30	Tea Break
			Grand Ball Room	Royal Ball Room	Maharaja-1	Maharaja-2	Diya	Turret
			Track: Analog and Mixed Signal Design Session chairs- Subrahmanyam Boyapati"	Track: Emerging Technologies & Circuit Design Session chairs- Debayan Das	Track – EDA & CAD Session chairs- Anand Bulusu	Track: AIML Hardware Accelerators Session chairs- Viveka K R	Track : Design Contest	Track: Industry, Startup
3:50 PM	4:10 PM	0:20	Invited Talk	PaperID – 201	PaperID – 149	PaperID – 83	Des Con-9	Industry Forum-12
4:10 PM	4:30 PM	0:20	PaperID – 104	PaperID – 272	PaperID – 354	PaperID – 98	Des Con-10	Industry Forum-13
4:30 PM	4:50 PM	0:20	PaperID – 218	PaperID – 369	PaperID – 84	PaperID – 47	Des Con-11	Startup Forum
4:50 PM	5:10 PM	0:20	PaperID – 252	PaperID – 375	PaperID – 137	PaperID – 251	Des Con-12	Startup Forum
5:10 PM	5:30 PM	0:20	PaperID – 95	PaperID – 3	PaperID – 316	PaperID – 303		Startup Forum

Program Summary

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