| Day T1 – January 5, 2019 (Saturday) |
|||||
| Start | End | Track A (Room 1) | Track B (Room 2) | Track C (Room 3) | Track F (Room 4) |
| 8:00 AM | 9:00 AM | Tutorial Registration | |||
| 9:00 AM | 10:30 AM | T1A: Automotive Security The Autonomous Automotive Robustness Duo: Challenges and Practice in Functional Safety and Security Prof. Sandip Ray (University of Florida, USA) Half-day Tutorial |
T1B: IoT-AI Ecosystem Designing in the Next Generation IoT-AI Ecosystem Dr. Manish Sharma (Samsung) and Mahesh Babu A K (Samsung) Half-day Tutorial |
T1C: Clock Synthesis Architecture and circuits for fractional-N clock synthesis in wireline/wireless applications Prof. Saurabh Saxena (IIT Madras) and Prof. Nagendra Krishnapura (IIT Madras) Full-day Tutorial |
T1F: DFT of Low Power SoCs [Hands-on Tutorial] Architecture & Methodology for DFT of Low Power SoCs Jais Abraham (Qualcomm) and Arvind Jain (Qualcomm) |
| 10:30 AM | 11:00 AM | Tea Break | |||
| 11:00 AM | 12:30 AM | T1A continued … | T1B continued … | T1C continued … | T1F continued … |
| 12:30 PM | 1:30 PM | Lunch | |||
| 1:30 PM | 3:00 PM | T1D: Logic Locking Logic Locking: Current Trends, Attacks and Future Directions Prof. Ujjwal Guin (Auburn University, USA) and Prof. Pramod Subramanyan (IIT Kanpur) Half-day Tutorial |
T1E: Analog Validation The black art of analog design and validation: where search and optimization meet Prof. Shobha Vasudevan (University of Illinois at Urbana Champaign, USA) Half-day Tutorial |
T1C continued … | T1G: FPGAs Using OpenVINO [Hands-on Tutorial] Accelerating Deep Learning Inference On FPGAs Using OpenVINO Vikas Hosoor (Intel) |
| 3:00 PM | 3:30 PM | Tea Break | |||
| 3:30 PM | 5:00 PM | T1D continued … | T1E continued … | T1C continued … | T1G continued … |
| Day T2 – January 6, 2019 (Sunday) |
||||
| Start | End | Track A (Room 1) | Track B (Room 2) | Track C (Room 3) |
| 8:00 AM | 9:00 AM | Tutorial Registration | ||
| 9:00 AM | 10:30 AM | T2A: Memory Testing Offset in Low-Voltage Sense Amplifiers and its Implication on Memory Testing Prof. Manoj Sachdev (University of Waterloo, Canada) Half-day Tutorial |
T2B: Validation Coverage Extending the validation coverage continuum from pre-silicon to post-silicon Gaurav Verma (NXP), Ashish Gupta (NXP) and Nagabhushan Reddy (Intel) Half-day Tutorial |
T2C: Autonomous Systems Vision based Autonomous Systems Prof. Subhashis Banerjee (IIT Delhi) and Prof. Chetan Arora (IIT Delhi) Half-day Tutorial |
| 10:30 AM | 11:00 AM | Tea Break | ||
| 11:00 AM | 12:30 AM | T2A continued … | T2B continued … | T2C continued … |
| 12:30 PM | 1:30 PM | Lunch | ||
| 1:30 PM | 3:00 PM | T2D: IoT Security Hardware Security of Embedded Systems and IoT Environment Prof. Susmita Sur-Kolay (ISI, Kolkata) and Prof. Debasri Saha (University of Calcutta) Half-day Tutorial |
T2E: Energy and Resilience Energy-Efficient Resilience for Cognitive Systems Dr. Pradip Bose (IBM) and Prof. Subhasish Mitra (Stanford, USA) Half-day Tutorial |
T2F: IoT for Healthcare IoT for Smarter Healthcare: From Device to Architecture, Applications and Analytics Prof. Nikil Dutt (University of California, Irvine) and Iman Azimi (University of Turku, Finland) Half-day Tutorial |
| 3:00 PM | 3:30 PM | Tea Break | ||
| 3:30 PM | 5:00 PM | T2D continued … | T2E continued … | T2F continued … |
VLSI Design Conference started as a simple idea in 1985: to sense the level of VLSI activities in India with a focus on engineering education & research. Over the years, the conference has grown equilaterally with a VLSI community that includes the likes of Multinational Industries, Academic contributors and Government bodies around the globe. With its global footprints VLSID is recognized as a 'Sister Conference' of Design Automation Conference. This conference is sponsored by VLSI Society of India (VSI).