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Meindert Van Den Beld
VP, Strategy Automotive Business, NXP Semiconductor
Keynote Title: Semiconductors for the Connected World – Safe, Secure, Smart
"Meindert van den Beld is VP, head of Strategy for the Automotive Businesses at NXP Semiconductors since 2013. He is responsible for Strategy, M&A, Market & Competitive Intelligence. During his tenure at NXP, he led the integration of NXP & Freescale Automotive, making NXP the #1 Automotive Semiconductor Company with over $4Bn sales.
Before joining NXP, Meindert worked with McKinsey & Company from 2004 to 2012 in the High Tech Practice for McKinsey & Company in The Netherlands and Switzerland.
Meindert holds an MSc degree in Mechanical Engineering from Delft University of Technology, an MBA from INSEAD in France and is a NOBCO/EMCC certified coach. He lives together with his partner and their 3 children in the Netherlands." |
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Nikil Dutt
Distinguished Professor, Departments of Computer Science, Cognitive Sciences, and EECS, University of California, Irvine
Keynote Title: Computational Self-Awareness: A Paradigm for Adaptive, Resilient Cyber-Physical Systems
Nikil Dutt is a Distinguished Professor of CS, Cognitive Sciences, and EECS at the University of California, Irvine, and also a Distinguished Visiting Professor of CSE at IIT Bombay. He received a BE (Hons) from BITS Pilani in 1980, MS from Penn State in 1983, and PhD from the University of Illinois at Urbana-Champaign in 1989. His research interests are in embedded systems, EDA, computer architecture and compilers, distributed systems, healthcare IoT, and brain-inspired architectures and computing. He has received numerous best paper awards and is coauthor of 7 books. Professor Dutt has served as EiC of ACM TODAES and AE for ACM TECS and IEEE TVLSI. He is on the steering, organizing, and program committees of several premier EDA and Embedded System Design conferences and workshops, and has also been on the advisory boards of ACM SIGBED, ACM SIGDA, ACM TECS and IEEE ESL. He is an ACM Fellow, IEEE Fellow, and recipient of the IFIP Silver Core Award. |
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Srini Maddali
VP Engineering, Qualcomm India
Keynote Title: Defining Superior User Experience in Next Gen Connected World
Srini Maddali is Vice President, Technology at Qualcomm India Design Center and leads SoC development Engineering teams. His current areas of focus are Design Verification, Low-Power & High-Performance SoC design, and SoC Methodology. Srini has been in the VLSI industry for the past 24 years, 15 of them with Qualcomm and his experience spans across Circuit Design, Memory Cell Design, High Speed Memory/System Interface Designs, Architecture and SoC design. Srini has Master degree in Engineering Physics from REC Warangal and holds 5 US patents.
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Dheemanth Nagaraj
Intel Fellow, Intel India Design Center
Keynote Title: Computing for the Data-Centric Era
Dheemanth Nagaraj is the first Intel Fellow from the Intel India Design Center. Dheemanth is a part of the Intel Architecture, Graphics, and Software organization responsible for throughput computing architecture. Prior to this he was part of the Scalable Performance CPU Development Group at Intel India team for 10+ years, designing server CPUs. He has been the lead Micro-Architect for the Broadwell family of Servers and Micro-servers. He was the key technical driver in instating the Xeon DE segment on the Intel server roadmap. Dheemanth joined Intel in Nov 2007 as lead Micro-Architect for Westmere-EX CPU. Prior to joining Intel, Dheemanth worked for HP on Itanium, PA-RISC CPUs and chipsets. Dheemanth holds a Masters in Computer Engineering from Purdue University and Bachelors in Electrical Engineering from NIT Surathkal, India. He has a number of granted/pending patents in the areas of Coherency, Memory RAS and Power Management. |
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Rajesh Gupta
Professor and Qualcomm Endowed Chair in Embedded Microsystems, Department of Computer Science & Engineering, University of California, San Diego
Keynote Title: CONIX: Computing on Network Infrastructure for New Generation of Cyber-Physical Systems and Applications
"Rajesh Gupta serves as a founding director of the Halicioglu Data Science Institute and as a professor of Computer Science and Engineering at UC San Diego. Professor Gupta's research is in embedded and cyber-physical systems with a focus on sensor data organization and its use in optimization and analytics. He has led several large scale projects including NSF Expeditions on Variability and DARPA projects under Data Intensive Systems (DIS) and Circuit Realization at Faster Timescales (CRAFT) programs. He currently leads NSF project MetroInsight and a co-PI on DARPA/SRC Center on Computing on Network Infrastructure (CONIX) with the goal to build new generation of distributed cyber-physical systems that use city-scale sensing data for improved services and autonomy. His past contributions include SystemC modeling and SPARK parallelizing high-level synthesis, both of which have been incorporated into industrial practice. Among recent recognition of his work is a best demonstration paper award at ACM BuildSys'16. He currently serves as Editor-in-chief of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
Gupta received a Bachelor of Technology in electrical engineering from IIT Kanpur, India; a Master of Science in EECS from University of California, Berkeley; and a PhD in electrical engineering from Stanford University, US. Prof. Gupta holds Qualcomm Endowed Chair in Embedded Microsystems at UC San Diego and INRIA International Chair at the French international research institute in Rennes, Bretagne Atlantique. He is a Fellow of the IEEE, the ACM and the AAAS (American Association for the Advancement of Science)." |
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Alok Jain
Cadence Design Systems
Keynote Title: Smarter Verification – Beyond Brute Force
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Kaushik Roy
Edward G. Tiedemann Jr. Distinguished Professor of Electrical and Computer Engineering, Purdue University
Keynote Title: Re-Engineering Computing with Neuro-Inspired Learning: Devices, Circuits, and Systems
"Kaushik Roy received B.Tech. degree in electronics and electrical communications engineering from the Indian Institute of Technology, Kharagpur, India, and Ph.D. degree from the electrical and computer engineering department of the University of Illinois at Urbana-Champaign in 1990. He was with the Semiconductor Process and Design Center of Texas Instruments, Dallas, where he worked on FPGA architecture development and low-power circuit design. He joined the electrical and computer engineering faculty at Purdue University, West Lafayette, IN, in 1993, where he is currently Edward G. Tiedemann Jr. Distinguished Professor. He also the director of the center for brain-inspired computing (C-BRIC) funded by SRC/DARPA. His research interests include neuromorphic and emerging computing models, neuro-mimetic devices, spintronics, device-circuit-algorithm co-design for nano-scale Silicon and non-Silicon technologies, and low-power electronics. Dr. Roy has published more than 700 papers in refereed journals and conferences, holds 18 patents, supervised 75 PhD dissertations, and is co-author of two books on Low Power CMOS VLSI Design (John Wiley & McGraw Hill).
Dr. Roy received the National Science Foundation Career Development Award in 1995, IBM faculty partnership award, ATT/Lucent Foundation award, 2005 SRC Technical Excellence Award, SRC Inventors Award, Purdue College of Engineering Research Excellence Award, Humboldt Research Award in 2010, 2010 IEEE Circuits and Systems Society Technical Achievement Award (Charles Doeser Award), Distinguished Alumnus Award from Indian Institute of Technology (IIT), Kharagpur, Fulbright-Nehru Distinguished Chair, DoD Vannevar Bush Faculty Fellow (2014-2019), Semiconductor Research Corporation Aristotle award in 2015, and best paper awards at 1997 International Test Conference, IEEE 2000 International Symposium on Quality of IC Design, 2003 IEEE Latin American Test Workshop, 2003 IEEE Nano, 2004 IEEE International Conference on Computer Design, 2006 IEEE/ACM International Symposium on Low Power Electronics & Design, and 2005 IEEE Circuits and system society Outstanding Young Author Award (Chris Kim), 2006 IEEE Transactions on VLSI Systems best paper award, 2012 ACM/IEEE International Symposium on Low Power Electronics and Design best paper award, 2013 IEEE Transactions on VLSI Best paper award. Dr. Roy was a Purdue University Faculty Scholar (1998-2003). He was a Research Visionary Board Member of Motorola Labs (2002) and held the M. Gandhi Distinguished Visiting faculty at Indian Institute of Technology (Bombay) and Global Foundries visiting Chair at National University of Singapore. He has been in the editorial board of IEEE Design and Test, IEEE Transactions on Circuits and Systems, IEEE Transactions on VLSI Systems, and IEEE Transactions on Electron Devices. He was Guest Editor for Special Issue on Low-Power VLSI in the IEEE Design and Test (1994) and IEEE Transactions on VLSI Systems (June 2000), IEE Proceedings -- Computers and Digital Techniques (July 2002), and IEEE Journal on Emerging and Selected Topics in Circuits and Systems (2011). Dr. Roy is a fellow of IEEE.
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Vijaykrishnan Narayanan
Distinguished Professor of Engineering and Electrical Engineering and Computer Science, Pennsylvania State University
Keynote Title: In Memory Compute - Technology Architecture Confluence
Vijaykrishnan Narayanan is Robert Noll Chair of Engineering in Computer Science and Engineering and Electrical Engineering at The Pennsylvania State University. He is a fellow of IEEE and ACM. He leads a NSF Expeditions-in-Computing Center on "Visual Cortex on Silicon" and is a thrust leader for the JUMP Center for Brain-inspired Computing Enabling Autonomous Intelligence. He is an investigator in the NSF ERC ASSIST, NSF/SRC EXCEL Center. Vijay is supported for his in-memory research by the JUMP Center for Research on Intelligent Storage and Processing-in-memory. |
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Sanjay Gupta
Vice President & India Country Manager, NXP Semiconductor
Keynote Title: NextGen Innovations Opportunities
Sanjay Gupta is the Vice President and India Country Manager at NXP India Pvt. Ltd. and leads the organization’s business in India while ensuring local compliance with both, government and corporate programs & policies. He is also spearheading three diverse R&D locations (Noida, Bangalore and Hyderabad) comprising nearly 1,800 employees and representing all NXP product groups.
Additionally, Sanjay is the Automotive Business Unit lead for NXP India and Chairs the Innovation board across global organizational units.
Sanjay started his professional journey with Motorola in 1996 and has worked on several assignments in the Wireless business, Digital Networking, Industrial MCU and automotive organizations. He holds multiple U.S. patents and numerous technical publications in the areas of semiconductors and embedded product development.
Sanjay has earned an engineering degree in electronics and communication from Delhi College of Engineering, and his MBA from the Indian School of Business, Hyderabad.
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Jaswinder Ahuja
Corporate Vice President and Managing Director, Cadence Design Systems
Keynote Title: Enabling the Data Driven Economy
Jaswinder S. Ahuja is a Corporate Vice President and the Managing Director of Cadence Design Systems in India. Jaswinder leads Cadence’s India Operating Region and the Global Customer Support and Educational Services Business. He started his career with Cadence in 1988 as a software engineer and has led the India operations since 1996. Under his leadership the India center has grown to a corporate resource center of nearly 2,000 employees across R&D, Corporate IT support, Global Customer Care and Field Operations.
Cadence is a founding member of the VLSI Society of India (VSI) and Jaswinder served as its President from 2011 to 2018. He serves on the advisory board of the Fabless Chip Design Incubator at IIT-Hyderabad, “FabCi”. He is a board member in the Electropreneur Park, the first ESDM incubator in India. He was Chairman of the India Semiconductor Association (ISA) in 2008-09 and has also served as a member of the Executive Council several times. Jaswinder has mentored several startups and entrepreneurs.
Jaswinder was conferred the first-ever Lifetime Achievement Award by the VSI Society of India in January 2018 to acknowledge his leadership and many noteworthy contributions to the semiconductor ecosystem in India.
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Dr V. Ramgopal Rao
IIT Delhi
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